Agentic workflows for semiconductor engineering

A typed tool layer sits over an open-source circuit simulator and a standard industry transistor model. Engineering checks enforce parameter scope and physical bounds before and after every change. The agent records its diagnosis, hypothesis, and expected effect before it acts. A senior engineer’s worked demonstration supplies the operating method.

Evaluation was a controlled study rather than a demonstration. It used real calibration tasks with known ground truth, held-out task variants, measured SKY130 silicon data associated with an open process design kit, and open model cards.

The contrast showed what the harness contributes. Without explicit scope, physical checks, and a usable method, an agent could produce convincing curves through unsupported parameter changes or by fitting effects the data could not identify. With the complete harness in place, it stayed within scope, focused on the engineering objective, and left unsupported parameters untouched. The controls improved both the result and the reasoning process behind it.

• Compact modeling
• Agent harness design
• Controlled evaluation

The system is designed to carry reviewed methods from one task into the next. Each agent run is stored as an immutable, schema-checked record that later runs cannot overwrite. A method becomes reusable only after review has recorded where it applies, a test that can be rerun, and the counterexamples already known.

The agent records its stated rationale before each action, so the history holds more than a sequence of parameter edits. It also records why each change was made, which is what makes the history worth distilling.

The learning loop has already shown a concrete effect. In controlled paired evaluations, a reviewed method changed both the agent’s mechanism diagnosis and the procedure it performed, rather than merely changing its explanation. This is the purpose of the loop: preserve experience as evidence, distill it into a usable method, and test that method before it guides later work. A blinded out-of-sample study is now testing how well the effect carries to new tasks.

• Evidence governance
• Method distillation
• Preregistered evaluation

Much of compact modeling is tacit. Engineers still have to judge what a parameter means, which measurements support a claim, and what counts as an acceptable fit. The ontology represents those judgments as a structured map of domain concepts, relations, quality rules, and figures of merit. Its own rules are checked automatically, each concept keeps a stable identity, and every version is preserved.

A process design kit is a useful analogy. A PDK does not expose the full manufacturing process. It compiles selected process knowledge, constraints, models, and verification interfaces into a form design teams can use. This work builds a comparable interface around the engineering work itself.

This layer may extend beyond compact modeling, but that claim still needs evidence. Semiconductor engineering is a useful test case: much of its expertise remains tacit, and its mistakes are expensive.

• Compact-modeling ontology
• Machine-checkable rules
• Versioned domain knowledge